New implementation methodology for ARM processors offers new levels of power efficiency and performance
Berkeley, CA – June 9, 2008 – Cyclos Semiconductor, Inc., a privately-held startup and the pioneering provider of resonant-clock design technologies for ultra-lowpower devices, today announced the industry’s first proof of concept processor implementation using the Cyclos™ Resonant-Clock (RCL) Platform™ and Cyclify™ standard-cell design flow. The project, code-named ELIZABETH, is a resonantclocked implementation of the ARM926EJ-S™ processor, providing silicon validation of the benefits resulting from the deployment of the RCL Platform in a commercial standard-cell processor design, and demonstrating the Cyclify flow on industry standard soft IP.
ELIZABETH has been implemented using commercial EDA tools from Cadence, Mentor Graphics, and Synopsys, and the ARM® Metro™ standard-cell library and memory compiler for the standard UMC 130nm bulk silicon process. The chip includes 16KB data/instruction caches and 32KB data/instruction tightly-coupled memories (TCMs).
Slow-process-corner chips operate with clock frequencies exceeding 200MHz at 125°C, achieving industry-leading worst-case power consumption of 0.35mW/MHz and up to 35 per cent lower power consumption than conventional counterparts. Correct and efficient operation is achieved at extreme temperatures (-35°C and 125°C) and for fast/slow chips.
ELIZABETH is compatible with the ARM® RealView® development platform and Cyclos can provide evaluation hardware that enables ARM Partners to directly evaluate the performance of the Cyclos-enabled ARM926EJ-S processor and validate the benefits of Cyclos low-power technology.
The Cyclos RCL Platform and Cyclify design flow are compatible with ASIC and system-on-chip (SoC) design flows. They can be used to design low-power resonantclock implementations of synchronous (clocked) ASICs and SoCs in general, without any change to their development and verification environments. The RCL Platform and Cyclify flow are now available for license direct from Cyclos. ARM licensees can leverage this technology to implement their own Cyclos-enabled ARM processors and other resonant-clock designs. In addition, Cyclos offers design services to ARM Partners for integrating the Cyclos RCL Platform into their ARM processors and other designs.
“Cyclos has worked with ARM to realize a new type of low-power processor,” said Marios Papaefthymiou, chief scientist and president, Cyclos Semiconductor. “The application of the Cyclos resonant-clock technology to the industry-leading ARM architecture enables new features, while extending the range of end-products that can benefit from running on an ARM processor.”
“ARM is committed to low-power processor solutions and has extended this commitment by working with Cyclos to enable them to demonstrate the first deployment of its low-power technology.” said Eric Schorn, vice president of marketing for the Processor Division at ARM. “This new development will ensure that our Partners have access to the industry’s first commercially-available resonant-clock methodology that achieves high processor performance whilst also extending battery life and reducing heat generation in mobile, automotive, medical, and consumer electronic applications.”
About Cyclos Semiconductor
Cyclos is the inventor and only commercial provider of resonant clock mesh technology for IC designs. The company was founded in 2006 as a spin out of the University of Michigan via their Technology Transfer Office. Based in Berkeley, CA and Ann Arbor, MI, Cyclos delivers resonant clock mesh semiconductor IP, design automation tools, and design consulting services for resonant clock mesh design solutions. For more information, visit http://www.cyclos-semi.com.